ENEL353-10W (C) Whole Year 2010

Computer Hardware Engineering I

24 points

Details:
Start Date: Monday, 22 February 2010
End Date: Sunday, 14 November 2010
Withdrawal Dates
Last Day to withdraw from this course:
  • Without financial penalty (full fee refund): Friday, 5 March 2010
  • Without academic penalty (including no fee refund): Friday, 3 September 2010

Description

Digital logic. Data representation. Digital components and signals. Combinational and sequential logic design and realisation. Microprocessor system design and programming. Simple and complex programmable logic devices. Hardware description languages and introduction to VHDL. CPU design and Field Programmable Gate Arrays (FPGAs).

Prerequisites

(1) ENEL206 or both ENCE208 and ENCE221; (2) Subject to approval of the Head of Department

Course Coordinator / Lecturer

Andrew Bainbridge-Smith

Lecturer

Steve Weddell

Assessment

Assessment Due Date Percentage 
MCU Project (P1) 15%
Final Examination 30%
Mid-Year Test (15/06/2010) 25%
FPGA Project (P2) 20%
Digital Logic Project 10%

Textbooks / Resources

Recommended Reading

Brown, Stephen D. , Vranesic, Zvonko G; Fundamentals of digital logic with VHDL design ; 3rd ed; McGraw-Hill, 2009.

Chu, Pong P; RTL hardware design using VHDL : coding for efficiency, portability, and scalability ; Wiley-Interscience, 2006.

Indicative Fees

Domestic fee $1,125.00

International fee $5,660.00

* All fees are inclusive of NZ GST or any equivalent overseas tax, and do not include any programme level discount or additional course-related expenses.

For further information see Electrical and Computer Engineering .

All ENEL353 Occurrences

  • ENEL353-10W (C) Whole Year 2010
Previous year Next year