ENCE362-14S2 (C) Semester Two 2014

Digital Electronics

15 points

Details:
Start Date: Monday, 14 July 2014
End Date: Sunday, 16 November 2014
Withdrawal Dates
Last Day to withdraw from this course:
  • Without financial penalty (full fee refund): Friday, 25 July 2014
  • Without academic penalty (including no fee refund): Friday, 10 October 2014

Description

An introduction to logic theory and its application to the analysis, synthesis and simulation of digital logic circuits. An introduction to logic devices and the digital assumption made of switching analogue circuits. Also covered is the implementation of circuit designs using a hardward description language with specific application to the design of ALUs and simple microprocessors.

Topics covered include:
Boolean algebra
Combinational logic
Sequential logic and finite state machines
VHDL
CPU architecture and operation
Noise margins
CMOS inverter electrical properties
Synthesis of logic gates and flip-flops in CMOS
Digital signal propagation on a transmission line
Supply decoupling

Learning Outcomes

  • At this end of this course students will be able to:
  • Understand and apply Boolean algebra including:  de Morgan's theory, sufficiency, SOP and POS form.
  • Obtain logic equivalences and minimise logic expressions using K-maps.
  • Analyse and synthesize combinational logic circuits from logic gates.
  • Understand the operation, and be able to synthesize, sequential logic and finite state machines.
  • Describe logic hardware in VHDL for implementation and simulation.
  • Understand the architecture and operation of a CPU and be able to implement a basic CPU in VHDL.
  • Obtain the output voltage versus input voltage transfer function of a CMOS inverter.
  • Obtain noise margins of CMOS gate and understand their significance.
  • Predict the propagation delays of a CMOS inverter.
  • Directly synthesize a logic expression in CMOS including calculating gate widths of each MOSFET.
  • Predict voltage and current waveforms at either end of a transmission line driven and terminated by CMOS inverters.
  • Understand the need for power-supply de-coupling.
  • Predict power consumed by a gate for a certain clock speed and capacitive load.
  • Demonstrate knowledge of a RS flip-flop circuit in CMOS and aware that it is the basic memory unit.

Prerequisites

Restrictions

ENEL353 or ENEL340

Course Coordinator

Volker Nock

Lecturers

Andrew Bainbridge-Smith and Steve Weddell

Assessment

Assessment Due Date Percentage 
Final Exam 60%
Homework 10%
Lab Assignment 20%
Test 10%

Textbooks / Resources

Recommended Reading

Sedra, Adel S. , Smith, Kenneth Carless; Microelectronic circuits ; International 6th ed; Oxford University Press, 2011.

Indicative Fees

Domestic fee $841.00

International fee $4,638.00

* All fees are inclusive of NZ GST or any equivalent overseas tax, and do not include any programme level discount or additional course-related expenses.

For further information see Electrical and Computer Engineering .

All ENCE362 Occurrences

  • ENCE362-14S2 (C) Semester Two 2014