Use the Tab and Up, Down arrow keys to select menu items.
COSC474-23S2 Special topic: Computer Architecture and ParallelismDescription: An advanced course for computer science and software engineering students on computer architecture, concurrency and parallelism (principally at a system level – bit, instruction and thread level). Topics covered include: CPU design, problems in parallelism, structures to improve performance (superscalar and cache design), VHDL/Verilog (programming), and examples of specialised designs (such as GPUs).Pre-requisites: ENCE260 Computer Systems
1. Students will understand (able to describe and critique) system-level designs of computer architecture (including superscalar, RISC, CISC, VLIW and cache designs)2. Students will be able to implement architectural designs in VHDL/Verilog (eg. cache controller)3. Students will be able to analyse problems in parallelism and concurrency (mutual-exclusion, race-conditions, idempotence, locks, Tomasulo’s algorithm and Peterson’s algorithm)4. Students will be able to demonstrate research skills, through literature search and review, in the space of computer architecture.5. Students are able to propose experiments to advance a concept in computer architecture.
Subject to the approval of the Head of Department
Students must attend one activity from each section.
Time Commitment: 150 hours• 24hr Lecture hours (2x1hr/week – 12 weeks)• 10hr Laboratory – formal help sessions on VHDL and Verilog programming (5x2hr/week – 5 weeks)• 30hr Self directed learning (lecture prep)• 70hr Project work• 16hr Test and Examinations (including prep time)
Lecturer: Andrew Bainbridge-Smith, Senior Lecturer Above the BarLecturer: Professor Dali Wang, Erskine Fellow from Christopher Newport University, Virginia, USA
Approximate Agenda:1. General computer architecture - Introduction, gate design to simple computing units, VHDL/Verilog2. Memory organisation - Memory hierarchy, cache design3. Concurrency and parallelism - bit, instruction and thread parallelism; mutual-exclusion; race-conditions; idempotence; locks; Tomasulo’s algorithm and Peterson’s algorithm4. Specialised architectural designs - Superscalar, multithreading5. Unconventional designs - systolic-arrays, number systems and arithmetic, hardware NNs6. GPUs - concepts and uses7. Quantum computing* - concepts and uses – This topic is yet to be confirmedProject:An individual project where the student is required to undertake a scholarly review of an approved topic in computer architecture. The student will be required to produce a written report including:• an explanation of the topic aimed at peers in the course (Learning Outcome 1)• a literature review on the topic, preferably including a meta-review and a number of recent publications in the area (Learning Outcome 4)• an implementation (or salient part thereof) in VHDL/Verilog of the topic – outline of the design in the report, with actual code as a supplementary submission (Learning Outcome 2)• to conduct some basic performance measurements of their implementation and to report on these (Learning Outcome 5)The project work is supported by a weekly 2 hour workshop session where both VHDL and Verilog programming is introduced to students. Students are only required to develop and implement their design ideas in one of the languages for their project, but are expected to develop understanding in both.Mid-Semester Test & Final Exam:These tests, aimed as assessing Learning Outcomes 1-3, will be designed to ensure students have adequate breadth of understanding and knowledge of the entire course.
Domestic fee $1,079.00
International Postgraduate fees
* All fees are inclusive of NZ GST or any equivalent overseas tax, and do not include any programme level discount or additional course-related expenses.
For further information see
Computer Science and Software Engineering